The invention relates to digital television, and in particular, to an HDTV receiver capable of compensating decision error during equalization.
The ATSC standard for HDTV transmission over terrestrial broadcast channels uses a signal that consists of a sequence of twelve independent time-multiplexed trellis-coded data streams modulated as an eight level vestigial sideband (VSB) symbol stream with a rate of 10.76 MHz.
FIG. 1 shows a conventional adaptive equalizer. A forward equalizer (FE) 102 receives a symbol stream r(n) for performing linear equalization to generate an FE output. A decision feedback equalizer (DFE) 108 receives a decision symbol stream d(n) for performing decision feedback equalization to generate a DFE output. The FE and DFE outputs are added by a first adder 104 to generate an equalizer output y(n). The decision symbol stream d(n) is generated by a slicer 106 slicing the equalizer output y(n). The term “slice” refers to the process of taking the allowed symbol value that is nearest to that of the output signal equalizer output y(n).
After equalization, a HDTV signal is decoded by a trellis decoder 110 utilizing Viterbi algorithm based on a ½ rate trellis coding. In the trellis decoder 110, twelve trellis decoders operate in parallel in a time multiplexed fashion, followed by an RS decoder 112 performing byte de-interleaving and Reed Solomon decoding for further error correction.
Thus, a typical equalization can be expressed as:
                              y          ⁡                      (            n            )                          =                                            ∑                              k                =                0                            K                        ⁢                                          r                ⁡                                  (                                      n                    +                    k                                    )                                            ·                                                c                                      -                    k                                                  ⁡                                  (                  n                  )                                                              +                                    ∑                              k                =                0                            K                        ⁢                                          d                ⁡                                  (                                      n                    -                    k                                    )                                            ·                                                c                  k                                ⁡                                  (                  n                  )                                                                                        (        1        )            
where symbol stream r(n) is the received data stream at time n; equalizer output y(n) is the equalizer output stream at time n; decision symbol stream d(n) is a sliced data stream at time n; c−k(n) is an FE coefficient vector comprising K+1 coefficients; and the coefficient vector ck(n) is a DFE coefficient vector comprising K+1 coefficients.
FIG. 2 shows another conventional adaptive equalizer. The output from forward equalizer 102 is added to the DFE output from decision feedback equalizer 108 in first adder 104 to form the equalizer output y(n). The trellis decoder 110 receives the equalizer output y(n) and feeds back decision symbol stream d(n) to the decision feedback equalizer 108. The decision symbol stream d(n) is used to reduce errors in the decision feedback equalizer 108. The ATSC standard specifies a rate ½ code trellis decoder where the symbols are interleaved into twelve different trellis decoders. The ATSC standard specifies path memory output lengths from twelve symbols to sixteen symbols. Thus, in an ATSC trellis decoder, a path memory of twelve to sixteen stages is typically used before final symbol decisions are made, and the total twelve interleaved symbols sum up a delay of 144 to 192 symbols. The twelve to sixteen path memory stages output intermediate values having better precision than the “hard” decisions made in the decision feedback equalizer 108, thus they offer an improved estimate for the symbols provided to the decision feedback equalizer 108. The trellis decoded stream dt(n) can be one or more path memory outputs of different stages from the trellis decoder 110, each with precision proportional to the stage numbers.